Worcester Polytechnic Institute Electronic Projects Collection

Title page for E-project-020708-124929


Project TypeMQP
Submission date2008-02-07
Authors
  • Devin P Auclair, ECE
  • Charles A Gammal, ECE
  • Fitzgerald J Huang, ECE
  • URNE-project-020708-124929
    SponsorNECAMSID
    TitleA 12b 100MSps Split Pipeline ADC with Open-Loop Residue Amplification
    Advisor
  • McNeill, John A, EE
  • Availability unrestricted

    Abstract

    The design of a low-power 12-bit 100MSps pipeline analog-to-digital converter (ADC) with open-loop residue amplification using the novel "Split-ADC" architecture is described. The choice of a 12b 100MSps specification targets medical applications such as portable ultrasound. For a representative ADC such as the ADS5270, the figure of merit (FOM) is approximately 1pJ/step and the power dissipation is 113mW. The use of an open-loop residue amplifier resulted in a FOM of 0.571pJ/step and a power dissipation of 11.2mW.

    Files
  • MQP_Report.pdf

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