Title page for E-project-042308-101647

Project Type MQP

Submission date 2008-04-23

Authors
Bryce Thomas Barcelo, ECE
John Alexander Taylor, ECE

URN E-project-042308-101647

Sponsor General Dynamics C4 Systems

Title Crypto Acceleration Using Asynchronous FPGAs

Advisor
Sunar, Berk, EE

Availability unrestricted

Abstract
The goal of this project, sponsored by General Dynamics C4 Systems, is to evaluate proprietary FPGA technology developed by Achronix Semiconductor Corporation and its effectiveness using a 128-bit, one clock cycle multiplier in a finite field, GF(2128), as a test application. The testing will determine if there is a significant increase in speed that can be achieved by simple modifications of existing synchronous HDL designs using three metrics: number of LUTs, number of registers, and clock speed.

Files
MQP_Paper_Final.doc
MQP_Paper_Final.pdf

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Project Type	MQP
Submission date	2008-04-23
Authors	Bryce Thomas Barcelo, ECE John Alexander Taylor, ECE
URN	E-project-042308-101647
Sponsor	General Dynamics C4 Systems
Title	Crypto Acceleration Using Asynchronous FPGAs
Advisor	Sunar, Berk, EE
Availability	unrestricted
Abstract The goal of this project, sponsored by General Dynamics C4 Systems, is to evaluate proprietary FPGA technology developed by Achronix Semiconductor Corporation and its effectiveness using a 128-bit, one clock cycle multiplier in a finite field, GF(2128), as a test application. The testing will determine if there is a significant increase in speed that can be achieved by simple modifications of existing synchronous HDL designs using three metrics: number of LUTs, number of registers, and clock speed.
Files	MQP_Paper_Final.doc MQP_Paper_Final.pdf