Worcester Polytechnic Institute Electronic Theses and Dissertations Collection

Title page for ETD etd-041314-201147


Document Typedissertation
Author NameWang, Wei
Email Address weiwang at wpi.edu
URNetd-041314-201147
TitleAccelerating Cryptosystems on Hardware Platforms
DegreePhD
DepartmentElectrical & Computer Engineering
Advisors
  • Xinming Huang, Advisor
  • Berk Sunar, Committee Member
  • Wenjing Lou, Committee Member
  • Keywords
  • RSA
  • VLSI
  • Fully homomorphic encryption
  • GPU
  • Date of Presentation/Defense2014-01-26
    Availability unrestricted

    Abstract

    In the past decade, one of the major breakthroughs

    in computer science theory is the first

    construction of fully homomorphic encryption (FHE)

    scheme introduced by Gentry. Using a FHE one may

    perform an arbitrary numbers of computations

    directly on the encrypted data without revealing

    of the secret key. Therefore, a practical FHE

    provides an invaluable security application for

    emerging technologies such as cloud computing and

    cloud-based storage. However, FHE is far from real

    life deployment due to serious efficiency

    impediments. The main part of this dissertation

    focuses on accelerating the existing FHE schemes

    using GPU and hardware design to make them more

    efficient and practical towards real-life

    applications. Another part of this dissertation is

    for the hardware design of the large key-size RSA

    cryptosystem. As the Moore law continues driving

    the computer technology, the key size of the

    Rivest–Shamir–Adelman (RSA) encryption is

    necessary to be upgraded to 2048, 4096 or even

    8192 bits to provide higher level security. In

    this dissertation, the FFT multiplication is

    employed for the large-size RSA hardware design

    instead of using the traditional interleaved

    Montgomery multiplication to show the feasibility

    of the FFT multiplication for large-size RSA

    design.

    Files
  • wei_thesis.pdf

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