Worcester Polytechnic Institute Electronic Theses and Dissertations Collection

Title page for ETD etd-092911-134747


Document Typedissertation
Author NameChen, Tsai Yuan
Email Address tsai125 at gmail.com
URNetd-092911-134747
TitleNetwork Electrophysiology Sensor-On-A- Chip
DegreePhD
DepartmentElectrical & Computer Engineering
Advisors
  • John McNeill, Advisor
  • Edward Clancy, Committee Member
  • Michael Coln, Committee Member
  • Keywords
  • EEG
  • ECG
  • EMG
  • Sigma-Delta ADC.
  • Date of Presentation/Defense2011-04-29
    Availability unrestricted

    Abstract

    Electroencephalogram (EEG), Electrocardiogram (ECG), and Electromyogram (EMG) bio-potential signals are commonly recorded in clinical practice. Typically, patients are connected to a bulky and mains-powered instrument, which reduces their mobility and creates discomfort. This limits the acquisition time, prevents the continuous monitoring of patients, and can affect the diagnosis of illness. Therefore, there is a great demand for low-power, small-size, and ambulatory bio-potential signal acquisition systems.

    Recent work on instrumentation amplifier design for bio-potential signals can be broadly classified as using one or both of two popular techniques: In the first, an AC-coupled signal path with a MOS-Bipolar pseudo resistor is used to obtain a low-frequency cutoff that passes the signal of interest while rejecting large dc offsets. In the second, a chopper stabilization technique is designed to reduce 1/f noise at low frequencies. However, both of these existing techniques lack control of low-frequency cutoff.

    This thesis presents the design of a mixed- signal integrated circuit (IC) prototype to provide complete, programmable analog signal conditioning and analog-to-digital conversion of an electrophysiologic signal. A front-end amplifier is designed with low input referred noise of 1 uVrms, and common mode rejection ratio 102 dB. A novel second order sigma-delta analog- to-digital converter (ADC) with a feedback integrator from the sigma-delta output is presented to program the low-frequency cutoff, and to enable wide input common mode range of ¡Ó0.3 V. The overall system is implemented in Jazz Semiconductor 0.18 um CMOS technology with power consumption 5.8 mW from ¡Ó0.9V power supplies.

    Files
  • ChenT.pdf

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