Email
navabi@wpi.edu
Office
Atwater Kent 214
Phone
+1 (508) 8315000 x6663

Zainalabedin Navabi

Graduate Studies Online
Adjunct Teaching Professor
Education
BS Electrical Engineering University of Texas, Austin 1975
MS Electrical Engineering University of Arizona 1978
PhD Electrical & Computer Engineering University of Arizona 1981

Dr. Zainalabedin Navabi is an adjunct professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments. Dr. Navabi’s involvement with hardware description languages begins in 1976, when he started the development of a register-transfer level simulator for one of the very first HDLs. In 1981 he completed the development of a synthesis tool that generated MOS layout from an RTL description. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages. He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full HDL courses at Northeastern University in 1990. Since then he has conducted many short courses and tutorials on this subject in the United States and abroad. Since early 1990’s he has been involved in developing, producing, and broadcasting online and video lectures on HDLs and various aspects of automated design. In addition to being a professor, he is also a consultant to CAE companies. And, at the present, he is conducting an online distance program on design at test at WPI. Dr. Navabi’s first book was in 1992, the first full-text on the VHDL language, and his most recent book was on Digital System Testing that is the first book on the subject that treats digital system testing from an RT level point of view. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1891, and his B.S. from the University of Texas at Austin in 1975. He is a senior member of IEEE, a member of IEEE Computer Society, member of ASEE, and ACM.

Scholarly Work

Digital System Test and Testable Design: Using HDL Models and Architectures; January 2011; Springer; ISBN: 978-1-4419-7547-8.

“Embedded Core Design with FPGAs”; August 1, 2006; McGraw Hill-Professional; ISBN: 0071474811.

Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification”; 2006; McGraw Hill-Professional; ISBN: 0070144564-1.

"Digital Design and Implementation with Field Programmable Devices", Kluwer Academic Publishers, 2005, ISBN: 1-4020-8011-5.