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Contact Information

Office:
Atwater Kent Laboratories, 319
Phone: +1-508-831-6663
navabi@wpi.edu

Zainalabedin Navabi

Dr. Zainalabedin Navabi is an adjunct professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments. Dr. Navabi’s involvement with hardware description languages begins in 1976, when he started the development of a register-transfer level simulator for one of the very first HDLs. In 1981 he completed the development of a synthesis tool that generated MOS layout from an RTL description. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages. He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full HDL courses at Northeastern University in 1990. Since then he has conducted many short courses and tutorials on this subject in the United States and abroad. Since early 1990’s he has been involved in developing, producing, and broadcasting online and video lectures on HDLs and various aspects of automated design. In addition to being a professor, he is also a consultant to CAE companies. And, at the present, he is conducting an online distance program on design at test at WPI. Dr. Navabi’s first book was in 1992, the first full-text on the VHDL language, and his most recent book was on Digital System Testing that is the first book on the subject that treats digital system testing from an RT level point of view. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1891, and his B.S. from the University of Texas at Austin in 1975. He is a senior member of IEEE, a member of IEEE Computer Society, member of ASEE, and ACM.


Research Interests

1. RTL Design and Test

2. Methodologies for System Level Design

3. Verilog Design and Synthesis

4. Verilog Elements of System Design

5. VHDL Simulation and Synthesis2

Education

1. B.S. in Electrical Engineering, University of Texas, Austin, 1975

2. M.S. in Electrical Engineering, University of Arizona, 1978.

3. Ph.D. in Electrical Engineering, University of Arizona, 1981.


Featured Publications

  1. Digital System Test and Testable Design: Using HDL Models and Architectures; January 2011; Springer; ISBN: 978-1-4419-7547-8.             
  2. VHDL: Modular Design and Synthesis of Cores and Systems, 3E; April 2007; McGraw Hill-Professional; ISBN: 978-0071475464.
  3. “Embedded Core Design with FPGAs”; August 1, 2006; McGraw Hill-Professional; ISBN: 0071474811.
  4. Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification”; 2006; McGraw Hill-Professional; ISBN: 0070144564-1.
  5. "Digital Design and Implementation with Field Programmable Devices", Kluwer Academic Publishers, 2005, ISBN: 1-4020-8011-5.
 
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