Title:
Design and Characterization of a 4 MS/s 8-bit Flash ADC in 180 nm CMOS for Dual-Channel Image Sensor Readout
Abstract:
This thesis presents the design, implementation, and characterization of a 4 MS/s 8-bit Flash ADC fabricated in a 180 nm CMOS process for use as a readout converter in a CMOS image sensor. Two identical ADC instances are implemented to serve even and odd pixel columns respectively, providing the imager with a frame rate of approximately 40 FPS. The architecture consists of a sample-and-hold stage with approximately 100 ns settling time, a 256-comparator resistor ladder, and ROM encoder. Device characterization strictly followed the IEEE 1241 standard for ADC testing, utilizing standard laboratory equipment, Verilog control logic on a custom PCB, and a Python-based GUI for data acquisition and processing. Measured static performance yielded a peak DNL of +1.816/−0.744 LSB and INL of +12.65/−1.01 LSB. Dynamic characterization at 4 MS/s produced an SINAD of 44.5 dB and an ENOB of 7.3 bits. The ADC supports multiple power modes ranging from 80 µW to 15 µW, with an active area of 260 µm². Channel-to-channel mismatch between the two instances is evaluated and discussed in the context of image sensor uniformity requirements.
Research Advisor:
Prof. Suat Ay
ECE Department, WPI
Research Committee:
Ibrahim Bozyel
Co-advisor, PhD Candidate, ECE Department, WPI
Prof. Ulkuhan Guler
ECE Department, WPI
Prof. John McNeill
ECE Department, WPI