ECE PhD Dissertation Defense by Zhenyuan (Charlottte) Liu, Pre-Silicon Hierarchical Root-Cause Analysis of Side-Channel and Fault Vulnerabilities in System-on-Chip Designs

Title:

Pre-Silicon Hierarchical Root-Cause Analysis of Side-Channel and Fault Vulnerabilities in System-on-Chip Designs

Abstract:

The growing complexity of modern SoC designs has made analyzing security vulnerabilities, such as side-channel leakage and fault effects, increasingly challenging. Traditionally, vulnerability assessment is performed only after design fabrication. This post-silicon black-box approach provides limited insight into design details, identifying weaknesses without explaining their root causes and resulting in both challenging countermeasure design and costly refabrication. 

This dissertation argues that vulnerability assessment can be supported to an earlier (pre-silicon) stage, where full access to the internal design enables root-cause analysis and allows the development of more effective mitigations. The key lies in the hierarchical evaluation of vulnerabilities, which bridges software and hardware layers to capture how weaknesses propagate through the design hierarchy. We propose two primary contributions. First, side-channel leakage can be addressed through a top-down analysis that traces how sensitive, software-defined asset, like a cryptographic key, influence lower hardware layers, enabling early detection and mitigation of leakage sources. Second, fault effects can be examined through a bottom-up analysis that tracks how hardware disturbances propagate to software outputs, revealing critical fault paths and guiding the design of effective mitigation.

Advisor:

Prof. Patrick Schaumont

ECE Department, WPI

Committee Members:

Prof. Fatemeh Ganji

ECE Department, WPI

Prof. Aydin Aysu

North Carolina State University